This invention relates generally to charge coupled device (CCD) technology and more particularly to an imaging array which operates in the time delay and integration mode.
Moving platforms incorporating solid state imaging apparatus are well known. Orbiting satellites, for example, provide platforms for remote sensing of the earth's surface. In one type of imaging apparatus, the earth's surface is scanned in one orthogonal direction by the motion of the platform and in another orthogonal direction by a moving mirror, with the resulting image being directed to an array of point detectors. The detectors review this image in one or more spectral bands in the visible to near infra-red region. Conventionally, the point detectors each have their own preamplifier and video channel. Image planes containing up to five spectral bands, including for example up to 20 detectors per band, however, are mechanically complex, and power consuming. In addition at the data rates and resolution required, they exhibit a relatively small signal to noise ratio margin.
Charge coupled devices wherein signal charge transport in the bulk of the semiconductor body is achieved by the application of control voltages synchronously applied to overlapping metal electrodes formed on the semiconductor body are also well known. It is also known to utilize such devices in imaging systems which are adapted to operate in a time delay and integration mode. Whereas systems employing point detectors have their sensitivity determined by the instantaneous illumination and scan rate of the system which limits the detector bandwidth, a CCD implemented imager operating in the time delay and integration mode significantly improves the signal to noise ratio of such a system.
In one known type of charge transfer imager, the CCD devices are arranged in groups of plural columns in each group with the light sequentially falling on each CCD element of the column which is sequentially read out in time to an output register thereby integrating the light impinging upon the column by a serial addition process whereupon the output register transfers the integrated column output to an output terminal.